Glen Pitt-Pladdy :: Blog
Adventures in Class D (part 2b) - ringing in switching circuits
Right now my Class D project is stalled with being busy with a load of other stuff and I picked up a big chunk of amp off eBay for a lot less than the cost of getting a PCB made which reduces it's priority further.
None the less, out of the blue I got an interesting email asking for advice about addressing gate ringing in Class D amps. As I'm a bit of a old hand when it comes to tricky electronics, and this is a subject that comes up so often in any kind of switching circuit, I thought it would be good to get it on the blog where everyone can benefit.
The first thing when working with any kind of high current switching circuit or anything with high frequencies (particularly when inductors are around) is to make sure that you can trust your measurements. I've spent a lot of time working on RFID / NFC designs where this can become a right pain.
Basic checks before we get started is to make sure your scope probes are adjusted properly... on the actual scope you are using as different scope's may have different input characteristics. It's also worth being aware of the spec of the scope (bandwidth, sample frequency) since it's quite easy to get false results with aliasing and other artefacts on some scopes.
Next, hook the probe up to the circuit, but probe the local ground instead of the signal. That gives you an idea of how much noise you are going to have in your measurements and how much you can trust them. If it's problematic then you may need to look at a better ground point or some other arrangement to ensure you get a clean trace.
Measurements are really important, and if you can't trust them then you are in deep guesswork territory - that's bad! When you have a clear idea of what is going on then the effects of each optimisation will be much easier to see... including when they have unexpected effects.
Theory and simulation are important, but when a design comes into the real world a whole lot of unexpected stuff often happens. Every conductor has some area and some proximity to other conductors. That means its actually a bucket load of capacitors to everything else.
The fun doesn't stop there. Every conductor is also an inductor, and invariably there are lots of loops on a PCB which creates even more inductance.
These are all parasitic components which theory (and most simulators) simply ignore.
L+C = ... you guessed right - a resonance circuit. Energy bounces back and forward between magnetic and electrical fields and hence we see classic ringing effects. Until that energy goes somewhere else (ie. is dissipated in resistances, real or parasitic) the ringing continues.
How badly parasitics effect things depends a whole lot on the design and the frequencies it's operating at. At say 50Hz typical parastic effects are negligible - it's highly unlikely you will see any unless you are doing something like power distribution over long distances (eg. I'm told there are lines in Africa that are so long that transmission line theory comes into play).
You don't need to go to extremes before parasitcs are doing unexpected things. Even at relatively low frequencies they can have significant effects especially at extremes of impedance, voltage and currents. Anyone who has done any amount of audio design knows how easy it is make an audio amp unstable due to parasitics.
When it comes to switching circuits parasitics are always troublesome. Sharp edges means high frequencies and high currents during switching means there is plenty of stimulus around. The inductance of component leads, layout, parasitic capacitances etc. all suddenly become a problem, and ringing is the #1 symptom.
All about Q... no, not him!
Q (Quality) factor is a measure of how effectively a resonant circuit (parasitic or otherwise) stores energy. A circuit of high Q will go on ringing for a long time where a low Q circuit will loose all it's energy quickly and stop ringing.
A Q of 0.5 is "optimally damped" or does not ring/overshoot at all. Above that overshoot and ringing becomes progressively worse. A Q a bit above 0.5 may actually help sometimes in that it can be used for faster rise times, but much further and we are quickly into serious ringing problems.
With LCR circuits it's rather easy to work out. For a series LCR Q = Xl/R and for parallel LCR Q = R / Xl where Xl = Xc and is the reluctance at resonance.
The typical gate-drive circuit is a series LCR. L comes from tracks, leads and loops, C comes largely from a MOSFET gate capacitance(s) and R is often a combination of drive impedance and a deliberately added (non parasitic) gate resistor.
The gate-source capacitance of MOSFETs seems to be well known and understood, but seldom mentioned yet often as important is the gate-drain capacitance also known as miller capacitance. While this is normally much smaller, the dV during switching is much greater.
Take for example ±50V supplies, nothing unusual for any reasonably powerful audio amp. During switching the miller capacitance will have a dV of 100V where the gate-source capacitance may only see a dV of 5-10V. A miller capacitance 1/10 - 1/20th of the source-gate capacitance is going to have the same effect. In some cases with high enough supply rails and depending on the device miller capacitance effects on switching speed can far exceed the gate-source effects.
From my previous article, take a look at the gate waveform - that step on the rise is the miller capacitance at work. It doesn't happen on fall since the MOSFET is slower switching off and my driver design deliberately has an asymmetric output impedance (more on that later).
Further complications can be introduced by the load (and filtering) which can introduce other signals to the drain. Fortunately with care in design these are relatively easy to deal with using snubbers and inductors (to isolate capacitive loads).
There are a number of drivers which avoid the need for floating the high-side driver supply and isolation of the control signals by using complimentary output devices. This may save complications and cost in the driver but adds them in when it comes to controlling ringing.
Since the drive current path goes through the driver and output supplies, any parasitics in the supplies, paths around the supplies, and in particular decoupling are also included in the mix. This means that supply decoupling is of extreme importance since it's carrying not only drive currents but output currents mixed up in things too.
This is far from an ideal solution though the approaches described below still apply, implementing them in an effective way may be difficult.
Damping - gate resistors
The obvious thing to reduce the Q is to increase R (gate resistor). This may work perfectly well if your switching frequencies are lower and there is enough dead time. Efficiency suffers (slower switching) and there is a real danger this ends up a fudge to get a non-optimum design working.
We'll park this for now and look at is more later after we've done other optimisations.
Damping - layout
Since we probably have restrictions due to other things (cost, availability, power handling etc.) with our choices of MOSFETs, the parasitic inductance is probably the best starting point. This is down to length of tracks, and in particular the size of the source-driver-gate loop. This is all about circuit layout.
The closer the drivers are to the MOSFET the lower the parasitic inductances. Likewise taking a nice short route keeping the loop area small reduces the inductances.
Another trick is the strategic use of PCB ground planes (possibly a local one on the high-side). This works like a transformer. If the secondary of a transformer is shorted then the inductance seen from the primary is dramatically reduced - in fact what you see is the primary referred leakage inductance... but transformer theory aside, that's all you need to know. Filling and surrounding your source-driver-gate loops with ground plane creates a shorted secondary.
Be aware though that this introduces additional parasitics, particularly capacitance. That may not be significant with power MOSFETs. Also consider if this ground plane actually needs to be grounded or just a floating shorted secondary.
Damping - parallel R
In some cases deliberately introducing a snubber (series RC) across the gate-source may help but is unlikely to be necessary with good control of parasitics for most circuits. The principle here is that the C becomes low impedance at high frequencies and adds the loss element, R across the circuit.
The lower the R (assuming it isn't <<Xc at the ringing frequency) the more this damps the circuit. Badly chosen values could make things worse though as it adds more reactive components to the mix.
The other thing to keep a handle on is that this is additional load on the driver and if the parasitic inductances are not sufficiently low then this will not be effective.
Damping - gate resistors again
Now that things are hopefully already much tidier, let's look at that gate resistor again. Increasing it will introduce more damping and reduce ringing but also slow down switching which in turn reduces efficiency and could even lead to shoot-through if dead time is not adjusted accordingly.
Often there is an inductive load (or just filters) being driven which means that currents at turn-on are relatively low compared to turn-off currents. If we can accelerate turn off with the larger gate resistor then it's often acceptable to increase it. This also means that dead time may not need to be adjusted, or at least not as much.
The common trick is to put a diode across the gate resistor.
At turn off the diode conducts accelerating the turn-off and once the current falls the diode comes out of bias and the resistor damps the ringing.
The key thing is the choice of diode. Currents can exceed 1A, in fact some drivers can deliver several amps. At these currents the voltage drop of small diodes may be significant. For a common diode like a 1N4148 it is plausible to exceed 2V forward voltage under such conditions. Not the ideal choice!
A fairly chunky diode will be needed. The popular 1N4001 will typically give a forward voltage around 0.9V at 1A which is much better but falls short in another way. When a diode is forward biased (conducting) and the voltage is reversed it continues to conduct for some time. This is called the reverse recovery time and for the 1N4001 it can be 30µs or potentially more. That would mean that it's still conducting during the ringing, in fact from about 30KHz up it's always conducting and not really much use as a diode.
Alternately faster diodes like UF4001 are much more the business with reverse recovery times better than 50ns. You may still have to look further if you are switching very fast. There are many others to choose from and Schottky diodes also have lower forward voltages. Capacitance of these sorts of diodes is much larger than 1N4148 type diodes and may become a problem for some applications but should still be plenty good enough for typical Power MOSFETs.
Part of the art of engineering is finding the best real-world compromise between ideal and functional. In some cases the only practical option may be to reduce switching frequency and/or adjust dead time to suit.
So... how does my driver avoid this?
Despite my "ratsnest" prototyping I get tidy waveforms.
Part of my tricks is that I use a non-saturating bipolar (BJT) design. This has the effect that the higher the output current, the lower the output impedance (good), but as the gate voltage comes to it's settling point and the output current reduces, the output impedance of the driver rises (even better). This non-linear impedance effectively give the lower impedances needed during switching while the higher impedances needed for damping after switching.
Another trick I use is that the turn-off drive goes directly onto the gate and the turn-on drive via the gate resistor. This means I can run larger gate resistors and still have fast turn-off.
MOS based drivers are hard switching - they are always in a low impedance state and so are much more prone to ringing.
Copyright Glen Pitt-Pladdy 2008-2015